One Time Programmable (OTP) memory can be fabricated in standard logic processes but can only be programmed once. Multiple-Time Programmable (MTP) memory can be programmed many times but fabrication requires special process steps and masks.
FIG. 1 shows a block diagram of a portion of a conventional OTP-for-MTP memory 10. An OTP-for-MTP memory is a physical OTP memory but appears to be capable of being programmed into the same address multiple times without the need to first erase data. The OTP-for-MTP memory 10 has 5 OTP banks, 12-0 through 12-4, with addresses and data coupled to external address and data bus DQ, respectively, through a multiplexer 13. The multiplexer 13 receives a bank select signal to route the external address/DQ to the address/DQ of each OTP bank 12-0 through 12-4, depending if the programming is the 1st, 2nd, 3rd, 4th or 5th time. In general, an n-time programmable MTP memory can be realized by using n arrays of the same size OTP memory for each time programming.
The techniques of using OTP to function as MTP as showed in FIG. 1 is relatively simple, but are not very efficient or cost effective. First, the size of the conventional MTP increases proportionately to the number of times it can be programmed. For example, for a 100-time MTP, a base OTP memory needs to be replicated 100 times to achieve the same functionality. Second, data utilization by the convention MTP is not very efficient. If the data in only one address of an OTP-for-MTP memory is programmed 100 times while the rest of the data stays the same, 99% of the programmability of the entire OTP memory capacity is wasted. Therefore, there is a need for improved techniques to achieve low cost, high data utilization, and efficient OTP-for-MTP memories.